This invention relates to methods of manufacturing an electronic device comprising a thin-film circuit element having a crystalline semiconductor region. The device may be a flat panel display (for example, a liquid crystal display), or a large-area image sensor, or several other types of large-area electronic device (for example, a thin-film data store or memory device, or a thermal imaging device). The invention also relates to devices manufactured by such methods.
There is currently much interest in developing thin-film field-effect transistors (hereinafter termed TFTs) and/or other thin-film circuit elements on glass and other insulating substrates for large-area electronics applications, for example flat panel displays. Such TFTs fabricated with amorphous or polycrystalline semiconductor films may form the switching elements of a cell matrix, for example, in a flat panel display as described in United States Patent Specification U.S. Pat. No. 5,130,829 or in published European Patent Application EP-A-0 683 525. The whole contents of U.S. Pat. No. 5,130,829 and EP-A-0 683 525 are hereby incorporated herein as reference material. A more recent development involves the fabrication and integration of thin-film circuit elements (usually with polycrystalline silicon), for example as integrated drive circuits for the matrix of a flat-panel display. Where high mobility is desired, for example for fast switching applications, crystalline semiconductor regions are generally used for the thin-film circuit elements.
The second embodiment of the method illustrated in FIG. 4 of EP-A-0 683 525 describes the manufacture of an electronic device in accordance with the non-characterising preamble features of the present claim 1. Thus, FIG. 4 shows a thin-film circuit element in the form of a TFT 22 having a crystalline semiconductor channel region in a semiconductor thin-film island 25 on a substrate 21. The device of FIG. 4 has laminated conductors 23 and 23a each comprising a metal film 31 on a less conductive film 30. The conductor 23a and a part of the conductor 23 extend on an area of the substrate 21 not covered by the island 25. The conductor 23 forms a gate line for the TFT 22, whereas the conductor 23a forms an auxiliary line. These laminated conductors 23 and 23a are covered by an insulating film 24 which provides the gate dielectric film below the TFT island 25.
The manufacturing method described in the second embodiment of FIG. 4 of EP-A-0 683 525 comprises the steps of depositing and patterning the less conductive film 30 and the metal film 31 to provide the laminated conductors 23 and 23a, depositing the insulating film 24, and depositing and patterning semiconductor material to provide the island 25. As described in lines 10 to 13 of column 10 of EP-A-0 683 525, the amorphous semiconductor material of the island 25 is crystallised by irradiation with a laser beam so as to form a polycrystalline channel region for the TFT 22. In this example, the less conductive film 30 is 200 nm of Ti, and the metal film 31 of smaller resistance value is 50 nm of Al. In the other embodiments, the less conductive film may be of a semiconductor material, for example silicon, and the metal film of smaller resistance value may be one or more of the metals Al, Mo, Ti, W, Cr, Ni and Ta.
In all the embodiments and modifications disclosed in EP-A-0 683 525, the metal film is always provided on top of the less conductive film, and never vice versa. The less conductive film is of a sufficient thickness to ensure the physical continuity of the laminated conductor, whereas the metal film lowers the line resistance and is overlaid thinly enough on the less conductive film to prevent the occurrence of surface variations such as hillocks during its deposition.
The use of laminated conductors comprising a metal film 37 on top of a semiconductor film 55 is also disclosed in U.S. Pat. No. 5,130,829. U.S. Pat. No. 5,130,829 also discloses the provision of a metal light shield for each of the switching circuit elements of its device matrix. FIGS. 5 and 6 and their description in column 7 of U.S. Pat. No. 5,130,829 illustrate switching elements in the form of polycrystalline silicon TFTs 11 formed in islands on an insulating film 56 which covers the metal light shield 45 and most of its connection track 46. The light shield 45 may be of a refractory material such as Mo or W. As described in lines 7 to 13 of column 7, the semiconductor island 50 may be crystallised with a laser beam, in which case it is suggested that a non-refractory metal may be used, for example Al, for the light shield 45 and its connection track 46.